Lecture Notes, Slides, Exercises
Number representations
- Course introduction, binary numbers
(notes)
(slides)
- twos complement, float, hexadecimal
(notes)
(slides)
-
IEEE floating point
(notes)
(slides)
Exercises 1
Combinational logic
- truth tables, gates, multiplexor
(notes)
(slides)
-
ROM, arithmetic circuits, encoders, decoders, ALU
(notes)
(slides)
Exercises 2
Sequential logic
- RS latch, the clock, D latch, D flip flop
(notes)
(slides)
- registers, counters and timers, memory
(notes)
(slides)
- multiplication, division, floating point ops
(notes)
(slides)
Exercises 3
MIPS Assembly Language
- instruction formats and examples 1
(notes)
(slides)
- instruction examples 2
(notes)
(slides)
- strings, arrays, assembler directives,
system calls
(notes)
(slides)
- functions
(notes)
(slides)
(sumton code)
- co-processors 0, 1
(notes)
(slides)
Exercises 4
MIPS CPU Datapath and Control
- single cycle model 1
(notes)
(slides)
- single cycle model 2
(notes)
(slides)
- multicycle model: pipelining
(notes)
(slides)
Exercises 5
Memory and I/O
- physical vs. virtual memory, page tables
(notes)
(slides)
- page table cache (TLB)
(notes)
(slides)
- data and instruction caches, hit and miss
(notes)
(slides)
- system bus, I/0 devices
(notes)
(slides)
- memory mapped I/O,polling, DMA
(notes)
(slides)
- interrupts
(notes)
(slides)
- asynchronous I/0
(notes)
(slides)
Exercises 6 (Memory)
Exercises 7 (IO and system bus)
Special Topics (not on final exam)
-
thinking of graduate school?
(slides)
-
A4 Q3 + associative caches (how caches work)
(slides)
- Java Virtual Machine
(slides)
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